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Notiziario Marketpress di
Giovedì 30 Gennaio 2003 |
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SEQUENCE LAUNCHES COLUMBUS-AMS SOC EXTRACTION TOOL
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Santa Clara, Calif. Jan. 30 , 2003 -- Sequence Design today introduced Columbus-ams, a 3-D, Rlc extractor for mixed-signal, analog, memory, and full-custom digital designs of 1 million transistors or more. Columbus-ams, based on the award-winning foundation technology of Columbus-rf, is part of Sequence´s Extractionstage, a suite of high-performance tools tuned for complex, multi-million-gate Socs and analog/mixed-signal design. Extracting inductance has become a key differentiator for Sequence. "On-chip inductance extraction with Columbus-ams is critical for analog circuits as well high-speed digital circuits," said Dr. Susheel Chandra, Sequence Senior Vice president of R&d and Product Marketing. "In analog circuits, inductance adversely affects critical specifications such as gain, center frequency, and frequency response." According to Dr. Chandra, a Sequence customer designing an Rf amplifier experienced a 20 percent center frequency shift and 10dB gain degradation due to parasitic inductance. In digital circuits, he noted, inductance commonly increases delay and clock skew by as much as 35 percent. Increased delays and clock skew reduce chip performance and can result in a functional failure. Customers using Columbus-ams typically achieved results within a 2 percent to 5 percent of a field solver, results validated in dozens of production designs and thousands of silicon measurements, Dr. Chandra added. Columbus-ams is easy to use with its integration into the Cadence Analog Artist environment, with no complicated rule decks to manage, and no new commands to learn. Columbus-ams is configurable for a variety of analog devices such as differential inductors and isolated Fets, and supports both Calibre and Diva flows. Columbus-ams also works with Calibre in a standalone flow for full-chip batch-mode extraction runs. In addition to flexible interfaces, Columbus-ams features new "Smart Probing" technology that allows the user to perform on-demand extraction and on-the-fly parasitic reduction. The on-the-fly parasitic reduction displays the inductance, capacitance, and resistance parasitics between two layout points in a compact lumped format that is easily understood by the user. Availability Columbus-ams is currently available. Existing users may upgrade their current versions of Columbus-rf. For more information, contact the Sequence sales team at: sales@sequencedesign.Com. Columbus-ams Feature Summary - >Highly accurate (within 2 percent to 5 percent of a field solver) inductance, capacitance, and resistance extraction Ideal for million-plus transistor, mixed-signal, analog, memory, and custom digital designs; Integrated into the Cadence Analog Design Environment; Supports both Calibre and Diva Lvs flows; Easy to set up and use - configurable for a variety of analog devices; Eliminate the need to support complex parasitic-extraction rule decks; Supported in Ibm design kits for Sige processes (Diva flow) Sequence Extraction Stage Extractionstage is the only suite of automated interconnect parasitic tools extracting highly accurate (results correlated within 2 percent to 5 percent of a field solver for a wide variety of cases) resistance, capacitance, and inductance values across a wide range of design styles. In addition to Columbus-ams, the Extractionstage suite includes Columbus-turbo, an accurate high-speed (greater than 3 million nets per hour with multiple Cpus) extractor for standard-cell flows. |
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